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Članci

Članci
Članci i publikacije

Uvid u rezultate istraživanja koja se realizuju u prestižnim naučno istraživačkim institucijama jedan je od najvažnijih uslova za postizanje dobrih rezltat u vlastitom istraživanju. Članci, koje istraživači objavljuju u renomiranim časopisima predstavljaju jedan od najvažnijih izvora navedenih informacija.

Članci – nepoznata godina

  1. Amaral, J. N., ” About Computing Science Research Methodology“
  2. Mohorko, J., Pešović, U., Paninšič, P., Čučej, Ž., “Using IEEE 802.15.4 Wireless Sensor Networks for ECG Monitoring Applications“
  3. Mick, J. R., “Microprogramming for the Hardware Engineer“
  4. Hassitt, A., “Microprogramming and High Language“
  5. Madnick, S. E., “Microprogramming“
  6. Hoff, G., “Design of Microprogrammed Control for General Purpose Processors“
  7. Kopec, S., Darbonne, T., “Ending Tie – ups in Peripheral IC Design“
  8. Shippen, G. B., Archibald, J. K., “A Tagged Token Dataflow Machine for Computing Small Iterative Algorithms“
  9. Schaffner, M. R., “A Computer Architecture and its Programming Languages“
  10. Schliebusch, O., Kammler, D., Chattopadhyay, A., “Automatic Generation of JTAG Interface and Debug Mechanism for ASIPs“
  11. Jovalekic, S., Rieger, M., Runge, R., “Design Micricomputer Platform with Real – Time Operating System for Laboratory Projects“
  12. Casini, M., Prattichizzo, D., Vicino, A., “The Automatic Control Telelab: a User – Friendly Interface for Distance Learning“
  13. Fischler, M. A., Firschein, O., “A Fault Tolerant Multiprocessor Architecture for Real – Time Control Applications“
  14. Qui, B., Gooi, H. B., “Web – Based SCADA Display Systems (WSDS) for Access via Internet“
  15. Parnas, D. L., “The Non – Problem of Nested Monitor Calls“
  16. Rattner, J., Cornet, J. Hoff, M. E., “Bipolar LSI Computing Elements Usher in NEW ERA of Digital Design“
  17. Eriksson, J., Dunkels, A., Finne, N., Osterland, F., Voigt, T., “Poster Abstract: MSPsim – an Extensible Simulator for MSP430 – equipped Sensor Board“
  18. Dunkels, A., Schmidt, O., Voigt, T., “Using Protothreades for Sensor Node Programming“
  19. Dunkels, A., Alonso, J., Voigt, T., “Making TCP/IP Viable for Wireless Sensor Networks“
  20. Yazar, D., Tsifites, N., Osterland, F., Finne, N., Eriksson, J., Dunkels, A., “Demo Abstract: Augmenting Reality with IP – based Sensor Networks“
  21. Osterlind, F., Eriksson, J., Dunkels, A., “Demo Abstracts: Cooja TimeLine: A Power Visualizer for Sensor Network Simulation“
  22. Balin, M., “IDEA – Interactive Deinterleaver for ELINT Analysis“
  23. Noone, G., Howard, S. D., “Deinterleaving Radar Pulse Trains Using Neural Networks“
  24. Nylanden, T., Janhunen, J., Hannuksela, J., Silven, O., “FPGA Based Application Specific Processing for Sensor Nodes“
  25. Perkins, J., Coat, I., “Pulse Train Deinterleaving via the Hough Transform“
  26. Helaihel, R., “Hardware – Software Co – Synthesis of JAVA Specification“
  27. Hsiung, P., Lee, T., Chen, S., “CMAPS: A Cosyntesis Methodology for Application – Oriented General – Purpose Parallel Systems“
  28. Torrellas, J., “Computer Architecture Education at the University of Illinois“
  29. Mohanty, S., Wilsey, P. A., “System Modeling, Hardware – Software Codesign and Mixed Modeling with Hardware Description Languages“
  30. Laliotis, T. A., “Implementation Aspects of the Symbol Hardware Compiler“
  31. Cooper, R. G., “Micromodules: Microprogrammable Building Blocks for Hardware Development“
  32. Fleisch, B. D., “An Architecture fro Pup Services on a Distributed Operating System“
  33. Wettstein, H., Merbeth, G., “The Concept of Asynchronization“
  34. Wilkes, M. V., Needham, R. M., “The Cambridge Model Distributed System“
  35. Herbert, A.  J., “A New Protection Architecture for the Cambridge Capability Computer“
  36. Lunn, K., Benett, K. H., “An Algorithm for Resource Location in a Loosely Linked Distributed Computer System“
  37. Pazirandeh, M., McBryan, O., “An Environment for Analysis of Parallel Systems (ESAP)“
  38. McBryan, O., “Parallel Computers: Current Systems and Capabilities“
  39. Stričević, L., Rakić, P., Hajduković, M., “Speeding up an MPI Cluster by Using Multiple Network Links on the Example Of Finite Strip Method Construction Analysis“
  40. Diković, D., Šipetić, D., Tatović, N., Pešović, U., Ranđić, S., “ZigBee – GPRS/GSM mrežni prenosnik“

Članci – 60. godine

  1. Kilburn, T., Edwards, D. B. G., Lanigan, M. J., Sumner, F. H., “One – Level Storage Systems“, IRE The Transaction on Electronic Computers, 1962 (Prevod sa engleskog jezika)
  2. Conti, C., J., Gibson, D. H., Pitkowsky, S. H., “Structural Aspects of the System/360 Model 85“, IBM Systems Journal, Vol. 7, No. 1, 1968
  3. Dijkstra, E. W., “The Structure of the “THE” – Multiprogramming System“, Communications of the ACM, Volume 11, Number 5, May 1968
  4. Lampson, B. W., “A Scheduling Philosophy for Multiprocessing Systems“, Communications of the ACM, Volume 11, Number 5, May 1968

Članci – 70. godine

  1. Cook, R. W., Flynn, M. J., “System Design of a Dynamic Microprocessor“, IEEE Transaction on Computers, Vol. C-19, No. 3, March 1970
  2. Kleir, R. L., Ramamoorthy, C. V., “Optimization Strategies for Microprograms“, IEEE Transactions on Computers, Vol. C-20, No. 7, July 1971
  3. Capon, P. C., Morris, D. Rohl, J. S., Wilson, I. R., “The MU5 Compiler Target Language and Autocode“, The Computer Journal, Volume 15, Number 2, October 1971
  4. Habermann, A. N., “Synchronization of Communicating Processes“, Communications of the ACM, March 1972, Volume 15, Number 3
  5. Moris, D., Detelfsen, G. D., Frank, G. R., Sweeney, T. J., “The Structure of the MU5 Operating System“, The Computer Journal, Volume 15, Number 2, 1972
  6. Per Brinch Hansen, “Structured Multiprogramming“, Communications of the ACM, July 1972, Volume 15, Number 7
  7. Bell, J., Casasent, D., Bell, C. G., “An Investigation of Alternative Cache Organizations“, IEEE Transactions on Computers, Vol. C-23, No. 4, April 1974
  8. Davis, E. D., “STARAN Parallel Processor System Software“, National Computer Conference, 1974
  9. Gagliardi, U. O., “Trends in Computing – System Architecture“, Proceedings of The IEEE, Vol. 63, No. 6, June 1975
  10. Bobeck, A. H., Bonyhard, P. I., Geusic, J. E., “Magnetic Bubbles – An Emerging New Memory Technology“, Proceedings of the IEEE, Vol. 63, No. 8, August 1975
  11. Patil, S. S., “Micro – Control for Parallel Asynchronous Computers“, Euromicro Workshop, Nice, France, 23 – 25 June 1975
  12. Galey, J. M., “Microprogramming: The Bridge Between Hardware and Software“, IEEE Computer, August 1975
  13. Mallach, E. G., “Emulator Architecture“, III Computer, August 1975
  14. Anderson, G. A., Jensen, E. D., “Computer Interconnection Structures; Taxonomy, Characteristics and Examples“, Computing Surveys, Vol. 7, No. 4, December 1975
  15. Dasgupta, S., Tartar, J., “The Identification of Maximal Parallelism in Strainght – Line Microprograms“, IEEE Transactions on Computers, Vol. C-25, No. 10, October 1976
  16. Fuller, S. H., Lesser, V. R., Bell, G., Kaman, C. H., “The Effects of Emerging Technology and Emulation Requirements on Microprogramming“, IEEE Transaction on Computers, Vol. C-25, No. 10, October 1976
  17. Tsuchiya, M., Gonzalez, M. J., “Toward Optimization of Horizontal Microprograms“, IEEE Transactions on Computers, Vol. C-25, No. 10, October 1976
  18. Rauscher, T. G., Agrawala, A. K., “Developing Application Oriented Computer Architectures on General Purpose Microprogrammable Machines“, National Computer Conference, 1976
  19. Baille, G. G., Schoellkopf, J. P., “A Pipeline Polish String Computer“, National Computer Conference, 1976
  20. Mohan, C., “Survey of Recent Operating Systems Research, Designs and Implementation“, October 1977
  21. Rammamoorthy, C. V., “Pipeline Architecture“, Computing Surveys, Vol. 9, No. 1, March 1977
  22. Swan, R. J., Fuller, S. H., Siewiorek, D. P., “Cm* – A Modular, Multi – microprocessoM“, National Computer Conference, 1977
  23. McWilliams, T. M., Fuller, S. H., Sherwood, W. H., “Using LSI Processor Bit – slice to Build a PDP – 11 – A Case Study in Microcomputer Design“, National Computer Conference 1977
  24. Jones, A. K., Chansler, R. J., Durham, I., Feuiler, P., Schwans, K., “Software Management of C* – A Distributed Multiprocessor“, National Computer Conference, 1977
  25. Ibbet, R. N., Capon, P. C., “The Development of the MU5 Computer System“, Communication of the ACM, January 1978, Volume 21, Number 1
  26. Per Brinch Hansen, “Distribzuted Processes: A Concurent Programming Concept“, Communications of the ACM, November 1978, Volume 21, Number 11
  27. Enslow, P. H., “What is a “Distributed” Data processing System?“, IEEE Computer, January 1978
  28. Forsdick, H. C., Schancz, R. E., Thomas, R. H., “Operating Systems for Computer Networks“, IEEE Computer, January 1978
  29. Jensen, E. D., “The Honeywell Experimental Distributed Processor – An Overview“, IEEE Computer, January 1978
  30. Peebles, R., Manning, E., “System Architecture for Distributed Data Management“, IEEE Computer, January, 1978
  31. Eckhouse, R. H., “Issues in Distributed Processing – An Overview of Two Workshops“, IEEE Computer, January 1978
  32. Golsing, J. B., Lavington, S. H., Kelly, J. M., “Extending Register – Transfer Technology to Teach Computer Architecture“, IEEE Computer, January 1978
  33. Lavington, S. H., “The Manchester Mark I and Atlas: A historical perspective“, Communications of the ACM, January 1978, Volume 21, Number 1
  34. Davis, N. C., Goodman, S. E, “The Soviet Bloc’s Unified System of Computers“, Computing Surveys, Vol. 10, No. 2, June 1978
  35. Per Brinch Hansen, “Distributed Processes: A Concurrent Programming Concept“, Communications of the ACM, November 1978, Volume 21, Number 11
  36. Dasgupta, S., “The Organization of Microprogram Stores“, Computing Surveys, Vol. 11, No. 1, March 1979
  37. Durniak, A., “VLSI Shakes the Foundations of Computer Architecture“, Electronics, May 24, 1979
  38. Reed, D. P., Kanodia, R. K., “Synchronization with Event counters and Sequencers“, Communications of the ACM, February 1979, Volume 22, Number 2

Članci – 80. godine

  1. Wilkes, M. V., “The Impact of Wide – Band Local Area Communication Systems on Distributed Computing“, IEEE Computer, 1980
  2. Jones, A. K., Schwarcz, P., “Experience Using Multiprocessor Systems – A Status Report“, Computing Surveys, Vol. 12, No. 2, June 1980
  3. Jayaram, N., Evans, P. L., “Distributed Mailbox Arrangement wich Facilitates Task Communication in a Multiprocessor System“, Electronic Letters, Vol. 17, No. 18, September 1981
  4. Roberts, E. S., Evans, A., Morgan, C. R., Clarke, E. M., “Task Management in Ada – A Critical Evaluation for Real – Time Multiprocessors“, Software – Practice and Experience, Vol. 1, 1019 – 1051 (1981)
  5. Edwards, D. B. G., Knowles, A. E., Woods, J. V. “MU6-G A New Design to Achieve Mainframe Performance from a Mini – sized Computer“, IEEE, 1980
  6. Denning, P. J., Denis, T. D., Brumfield, J. A., “Low Contention Semaphores and Ready Lists“, Communication of the ACM, October 1981, Volume 24, Number 10
  7. Per Brinch Hansen, “Edison – a Multiprocessor Language“, Software – Practice and Expirience, Vol. 11, 325 – 361 (1981)
  8. Per Brinch Hansen, “The Design of Edison“, Software – Practice and Expirience, Vol. 11, 363 – 396 (1981)
  9. Ang, W. S., “Common Element Key to Multiprocessor Architecture“, Computer Design, October 1981
  10. Wegner, P., “Self – Assesstment Procedure VIII“, Communications of the ACM, October 1981, Volume 24, Number 10
  11. Pohjanpalo, H., “ MROS – 68K, a Memory Resident Operating System, for MC68000“, Software – Practice and Experience, Vol. 11, 845 – 852 (1981)
  12. Rauch – Hindin, V., “Universities are Setting Trends in Data Comunication nets“, Data Communications, October 1981
  13. Dopran, R. W., “The Amdahl 470/8 and the IBM 3033: A Comparision of Processor Designs“, IEEE Computer, April 1982
  14. Rennie, L. J., “Forward – Looking Error Correction Via Extended Golay“, Computer Design, June 1982
  15. Lewis, A., “16 – bit Operating Systems, a whole New Ball Game“, Computer Design, June 1982
  16. Horovitz, D., Holsworth, F., Wharton, F., “Concurenncy: Key to 16-bit Operating System Efficiency“, Computer Design, June 1982
  17. Joshi, S., Mithani, D., “Microprogrammed System Design“, Computer Design, June 1982
  18. Collins, J. P., Lewitt, M. M., “An Object Oriented Operating System for Microcomputers“, Computer Design, June 1982
  19. Cassola, R. L., “Floating Point Algorithm Design“, Computer Design, June 1982
  20. Hwang, K., Croft, W. J., Goble, G. H., Wah, B. W., Briggs, F. A., Simmons, W. R., Coates, C. L., “A Unix – Based Local Computer network with Load Balancing“, IEEE Computer Magazine, 1982
  21. Haynes, L. S., Lau, R. L., Sieworek, D. P., Mizell, D. W., “A Survey of Highly Parallel Computing“, IEEE Computer, January 1982
  22. Mazor, S., Wharton, S., “Compact Code – iAPX 432 Addressing Techniques“, Computer Design, May 1982
  23. Morgan, K., “Database Processor Offers Small – System Option“, Mini – Micro Systems, October 1982
  24. Gotlieb, A., Grishman, R., Kruskal, C. P., McAuliffe, K. P., Rudolph, L., Snir, M., “The NYU Ultracomputer – Designing an MIMD Shared Memory Parallel Computer“, IEEE Transaction on Computers, Vol. C-32, No. 2, February 1983
  25. Fallin, J. J., Altnether, J. P., Righter, W. H., “The Chip that Refreshes Itself“, Computer Design, March 1983
  26. Mendelsson, A., “32 – bit Biploar Building Blocks Debuit at AMD“, Integrated Circuits Magazine, November 1984
  27. Gajski, D. D., Peir J., “Essential Issues in Multiprocessor System“, IEEE Computer, June 1985
  28. Murakami, K., Kakuta, T., Onai, R., Ito, N, “Research on Parllel Machine Architecture for Fifth Generation Computer System“, IEEE Computer, June 1985
  29. Patton, P. C., “Multiprocessors: Architecture and Applications“, IEEE Computer, June 1985
  30. Smith, J. E., Weiss, S., Pang, N. Y., “A Simulation Srudy of Decoupled Architecture Computers“, IEEE Transactions on Computers, Vo.. C-35, No. 8, August 1986
  31. Pal, A., “An Algorithm for Optimal Logic Design Using Multiplexers“, IEEE Transaction on Computers, Vol. C-35, No. 8, August 1986
  32. Cole, B. C., “Bipolar Comes Alive Again as Development Speeds Up“, Electronices, September 4, 1986
  33. Asal, M., Short, G., Preston, T., Simpson, R., Roskell, D., Guttag, K., “The Texas Instruments 34010 Graphics System Processor“, IEEE Computer Graphics and Applications, 1986
  34. Terborgh, J. R., “Indoor Unit for Satellite TV Reception – 1“, EE, October 1986
  35. Gillig, J. R., Iacobucci, F. L. Rawson, I., Tunkel, J. A., “How OS/2 Supports Larger Applications“, Mini / Micro Szstems, December 1987
  36. Koopman, P., “The WISC Concept“, Byte, April 1987
  37. Miller, D. L., “Stack Machines and Compiler Design“, Byte, April 1987
  38. Johnson, T. L., “The RISC/CISC Melting Pot“, Byte, April 1987
  39. Ackerman, M., Baum, G., “The Faichild Clipper“, Byte, April 1987
  40. Wiegand, J., “Digital Signal Processing Enters the Mainstream“, EDN, August 6, 1987
  41. Grehan, R., “PC – MOS/386“, Byte, September 1987
  42. Breuer, M. A., Saheban, F., “Built – in Test for Folded Programmable Logic Array“, Microprocessors and Microsystems, Col. 11, No. 6, Juky/August 1987
  43. Maundy, B., “Designing with Programmable Logic Arrays“, Microprocesors and Microsystems, Vol. 11, No. 9, November 1987
  44. Naedel, D., “Open Architecture in Military Computers“, Defense Computing, March/April 1988
  45. Wallach, S., “Supercomputing Solutions and Trends“, Defense Computing, March/April 1988
  46. Hennessy J., “RISC Architectures and Their Use in Embedded Systems“, Defense Computing, March/April 1988
  47. Waterman, P., “Parallel Processing Finds a Place“, Defanse Computing, March/April 1988
  48. Vojvodic, I.. V., Vranes, P. A., “Distributed Intelligence and Bus Hierarchy System Implementation for a Highly Intelligent Workstation“, Microprocessing and Microprogramming 23 (1987) 351 – 354
  49. Fischer, J., “Microprogramming, Microprocessing and Supercomputing“, Microprocessing and Microprogramming 24 (1988), 17 – 20
  50. Painke, H., “VLSI/370 Microprocessor Overview“, Microprocessing and Microprogramming 24 (1988) 23 – 28
  51. Schettler, R., “VLSI/370 Microprocessor Chip Technology“, Microprocessing and Microprogramming 24 (1988) 29 – 34
  52. Roesner, W., “The Logic Design Language and Verification Environment for the VLSI/370“, Microprocessing and Microprogramming 24 (1988) 35 – 42
  53. Kick, B., “Logic Synthesis in Design of the VLSI/370 Microprocessor“, Microprocessing and Microprogramming 24 (1988) 43 – 48
  54. Gerst, H., “Verification of the VLSI-/370 Microprocessor“, Microprocessing and Microprogarmming 24 (1988) 137 – 146
  55. Curatelli, F., Bisio, G. M., Borghero, G., Zitti, E. Di., “ A Behaviooural Simulator and its Use for the Validation of Hypercube Architecture“, Microprocessing and Microprogramming 24 (1988) 213 – 218
  56. Heinkele, S., “Timing Verification for the VLSI/370 Microprocessor“, Microprocessing and Microprogramming 24 (1988) 125 – 130
  57. Schulz, U., “Hierarchial Phiysical Design System for VSLI/370 Microprocessor“, Microprocessing and Microprogramming 24 (1988) 131 – 136
  58. Raud, R., “A Language Enivronment for ASIC Design“, Microprocessing and Microprogramming 24 (1988) 219 – 226
  59. De Man, J. A., “Designing Digital Systems with a Function Language“, Microprocessing and Microprogramming 24 (1988) 227 – 232
  60. Fox, A., Sparcklen, C. T., Jolly, C.- P., “Logic Synthesis With Contsraints“, Microprocessing and Microprogramming 24 (1988) 339 – 346
  61. Peng, Z., “Let’s Design Asynchronous VLSI Systems“, Microprocessing and Microprogramming 24 (1988) 347 – 352
  62. Antola, A., “Evaluation of Complexity for Different Layouts of Butterfly Networks“, Microprocessing and Microprogramming 24 (1988) 353 – 360
  63. Juntunen, T., Kivela, J., Reinikka, A., Sipola, M., Soininen, J., Tiensyrja, K., Tikkanen, T., “Real – Time Structured Analysis in System Level Design of Embedded ASICs“, Microprocessing and Microprogramming 24 (1988) 449 – 454
  64. Saeter, T., “Software Techniques fir Integrating Text and Graphics in VLSI CAD Tools“, Microprocessing and Microprogramming 24 (1988) 455 – 460
  65. Hersch, R. D., Maddaleno, F., Nicks, C., Burki, M., “The Video RAM Multiprocessor Architecture“, Microprocessing and Microprogramming 24 (1988) 503 – 510
  66. Gonsalez, A., Liaberia, J. M., Cortadela, J., “A Mechanism for Reducing the Cost of Branches in RISC Architecture“, Microprocessing and Microprogramming 24 (1988) 565 – 572
  67. Çortadela, J., Jove, T., “Designing a Branch Target Buffer for Executing Branches with Zero Time Cost in a RISC Processor“, Microprocessing and Microprogramming 24 (1981) 573 – 580
  68. Anido, M. L., Allerton, D. J., Zaluska, E. J., “The Architecture of RIG: A RISC for Image Generation in a Multi – Microprocessor Environmrent“, Microprocessing and Microprogramming 24 (1988) 581 – 588
  69. Dumont, A., Gilson, E., Trullemans, C., “BRISC: A RISC Biprocessor Architecture Dedsicated to Power Applications“, Microprocessing and Microprogramming 24 (1988) 589 – 596
  70. Reddaway, S. F., Page, R. M. R., “High Speed Searching with a Processor Array“, Microprocessing and Microprogramming 24 (1988) 655 – 660
  71. Cohen, E. J., Marko, R. A., Levy, J., “Integrating an On – Chip MMU Into a Highly Pipelined Architecture“, Microprocessing and Microprogramming 24 (1988) 709 – 714
  72. Loewenstein, P., Fox, A., “Closing the Semantic Gap“, Microprocessing and Microprogramming 24 (1988) 767 – 772
  73. Maresca, M., Li., H., “A VLSI Implementation of Polymorphic – Torus Architecture“, Microprocessing and Microprogramming 24 (1988) 737 – 742
  74. Shi – Yao, J., Shuan, Z., Shi – Sheng, Y., “A Vectorized Superminicomputer, VAX – 11/700 with Vector Processing“, Microprocessing and Microprogramming 24 (1988) 743 – 746
  75. Krikelis, A., Lea, R. N., “An Asociative String Processor Architecture for Parallel Processing Applications“, Microprocessing and Microprogramming 24 (1988) 747 – 754
  76. Reitman, J., “Mil – Spec in Perspective“, Defense Computing, March/April 1988
  77. Till, J., “Computer System Architecture“, Electronic Design, January 1989
  78. Jenkins, J. H., “Bridging the Gap Between PLDs and Gate Arrays“, The Electronics WSystem Design Magazine, January 1989
  79. Benis, P., “PRISM With a Million Gates“, The Electronic System Design Magazines, January 1989

Članci – 90. godine

  1. Stojanović, D., Ranđić, S., “Adaptivno upravljanje položajem osovine jednosmernog motora”, IV Konferencija SAUM, Kragujevac, 17. – 18. juna 1992.
  2. McBryant, O. A., “Limiting Factors in High Performance Computing“, Invated talk at the PARA94Conference, Copenhagen, Denmark, June 21 – 24, 1994, Proceedings of the PARA94 Conference, ed. J. Wazniewski, Lectures in Computer Science, Springer – Verlag, 1994
  3. Hoang L., “Microprocessors and Digital IC’s for Motion Control“, Proceedings of the IEEE, Vol. 82, No. 8, August 1994
  4. Bimal. K. B., “Expert System, Fuzzy Logic and Neural Network Applications in Power Electronics and Motion Control“, Proceedings of the IEEE, Vol. 82, No. 8, August 1994
  5. Bhavaraju, V. B., Enjeti, P. N., “An Active Line Conditioner to Balance Voltages in a Three – Phase System“, IEEE Transaction on Industry Applications, Vol. 32, No. 2, March/April 1996
  6. Gasbarro, J. A., “The RAMBUS Memory System“, IEEE 1996
  7. Mittal, M., Peleg, A., Weiser, U., “MMX Technology Architecture Overview“, Intel Technology Journal Q3 ’97
  8. Helaihel, R., lukotun, K., “JAVA as a Specification Language for Hardware – Software Systems“, Proceedings of ICCAD ’97, November 9 – 13, 1997, San Jose
  9. Costa Branco, P. J., Dente, J. A., “An Experiment in Automatic Modeling an Electrical Drive System Using Fuzzy Logic“, IEEE Transaction on Systems, Man and Cybernetics – Part C: Applications and Reviews, Vol. 28, No. 2, May 1998

Članci – Posle 2000. godine

  1. Salzmann, C., Gikket, D., “Real – Time Interaction over the Internet“, IFAC 15th Triennial World Congress, Barcelona, Spain, 2002
  2. Lin, P. I., Broberg, H. L., “Internet Based Monitoring and Controls for HVAC Applications“, IEEE Industry Applications Magazine, January/February 2002
  3. Klenke, R. H., Tucker, J. H., Blevins, J. M., “A New Hardware/Software Codesign Environment and Senior Capstone Design Project for Computer Engineering“, Proceedings of the 2003 IEEE International Conference on Microelectronic Systems Education (MSE’03)
  4. Martinez, J. P., Almeida, R., Olmos, S, Rocha, A., Laguna, P., “A Wavelet – Based ECG Delineator: Evaluation on Standard Databases“, IEEE Transaction on Biomedical Engineering, Vol. 51, No. 4, April 2004
  5. Vejo, J., Bellido, M. J., Millan, A., Ostua, E., Juan, J., Ruiz.de-Claviji, J. P., Guerrero, D., “Efficient Design and Implementation on FPGA of a MicroBlaze for Processing Direct Electrical Network Measurements“, IEEE 2006
  6. Jang, Y., Kim, J., Lee, S., Lee, S., Byun, Y., “Design of Sensor Signal Processing Algorithm and it’s SoC Architecture for Bio – Sensor Systems and Intelligent Robots“, Proceedings of the 9th WSEAS International Conference on Applied Informatics and Communications (AIC’09)
  7. Shahriyar, R., Bari, M. F., Kundu, G., Ahmed, S. I., Akbar, M. M., “Intelligent Mobile Health Monitoring System (IMHMS)“, International Journal of Control and Automation Vol. 2, No. 3, September 2009
  8. Liping, Z., Wensheng, G., “Self – Organizing Maps Neural Networks on Parallel Cluster“, IEEE The First International Conference on Information Science and Engineering (ICISE2009)
  9. Pessapati, R., Sabat, S. L., Venu, K., “Automatic IP Core Generation in SoC“, International Journal of Recent Trends in Engineering, Vol. 2, No. 6, November 2006

Članci – Posle 2010. godine

  1. Jacobsen, R. H., Zhang, Q., Toftegaard, T. S., “Bioinspired Principles for large – Scale Networked Sensor Systems: An Overview“, Journal Sensors, 2011
  2. Das, M., Panda, B. K., “Prototyping a Wireless Sensor Node using FPGA for Mines Safety Application“, ACEEE Int. Journal on Electrical and Power Engineering, Vol. 02, No. 02, August 2011
  3. Kumar, P., Chhokar, S., “An Intelligent System Based on Sensor Integration & Sensor Fusion“, International Journal of Advanced Research in Computer Science and Software Engineering, Volume 2, Issue 3, March 2012
  4. Anemaet, P., As, T., “Microprocessor Soft – Cores: An Evaluation of Design Methods and Concepts on FPGAs”,
  5. “Microblaze Softcore and Digilent S3 FPGA Demonstration Board“, Tutorial, Computer Electronics, 1st Semester, 2011/2012
  6. Shea, R., Liu, J., Ngai, C. H., Cui, Y, “Cloud Gaming: Architecture and Performance“, IEEE Network, July/August 2013, pp. 16 – 21
  7. Liao, J., Singh, B.- K., Khalid, M. A. Tepe, K. E., “FPGA based wireless sensor node with customizable event – driven architecture“, EURASIP Journal on Embedded Systems 2013, 2013:5

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